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CLUCK SIGNAL SELECTING APPARATUS OF DOUBLE CLUCK SYSTEM

机译:双点击系统的点击信号选择装置

摘要

The clock signal selecting device for a double clock system comprises: a first synchronizing unit for generating a first synchronizing signal which is synchronized with a first clock signal in response to a clock selection signal and stopping generation of the first synchronizing signal in response to a first clear signal; a second synchronizing unit for generating a second synchronizing signal which is synchronized with a second clock signal in response to the clock selection signal and stopping generation of the second synchronizing signal in response to a second clear signal; a first control unit for synchronizing and shifting continuously input logic "1" values with the first clock signal, NANDing the shifted bit value and the clock selection signal and generating the second clear signal; a second control unit for synchronizing and shifting continuously input logic "1" values with the second clock signal, NANDing the shifted bit value and an inverted clock selection signal and generating the first clear signal; and a logic unit for synchronizing the shifted bit values of the first and second control units with the first and second clock signals and logic-operating them.
机译:用于双时钟系统的时钟信号选择设备包括:第一同步单元,用于响应于时钟选择信号而生成与第一时钟信号同步的第一同步信号,并且响应于第一时钟信号而停止生成第一同步信号。清除信号;第二同步单元,用于响应于时钟选择信号而产生与第二时钟信号同步的第二同步信号,并响应于第二清除信号而停止第二同步信号的产生;第一控制单元,用于将输入的逻辑“ 1”值与第一时钟信号连续地同步和移位,对移位后的比特值和时钟选择信号进行“与非”,并生成第二清除信号;第二控制单元,用于将输入的逻辑“ 1”值与第二时钟信号连续地同步和移位,将移位后的比特值和反相的时钟选择信号进行“与非”,并产生第一清零信号;逻辑单元,用于将第一控制单元和第二控制单元的移位后的比特值与第一时钟信号和第二时钟信号进行同步并对其进行逻辑运算。

著录项

  • 公开/公告号KR950013799B1

    专利类型

  • 公开/公告日1995-11-16

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR19930003390

  • 发明设计人 CHO HAN - BOM;

    申请日1993-03-06

  • 分类号H03K5/00;

  • 国家 KR

  • 入库时间 2022-08-22 03:46:18

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