Test Clock (TCK) Automatic Generation Circuit for Boundary Scan Functions in Integrated Circuits

摘要

The present invention particularly provides a test mode signal (TMS) output from a test selector in a boundary scan function that detects an error of a system operation by searching a state of each pin of an integrated circuit or an operating state of an internal chip. By using this signal, the test signal (TCK) can be automatically generated using the selection signal of the test input data (TDI) and the selection signal of the test output data (TDO). The present invention relates to a test clock (TCK) automatic generation circuit for realizing boundary scan functions of an integrated circuit, and to selecting a test mode signal (TMS) and a test input data (TDI). The test clock TCK can be automatically generated by these signals using the selection signal of the test output data TDO. It is possible to reduce the amount of data in the CPU and thereby improve the data processing speed.