PARALLEL SIGNAL CONVERSION CIRCUIT AND PARALLEL SIGNAL SYNCHRONIZING CIRCUIT

摘要

PROBLEM TO BE SOLVED: To simplify the constitution of a parallel signal conversion circuit by rearranging 32 bits, which is across two times but should be the parallel signal of the same time, to be in the same time. ;SOLUTION: A time equalizing circuit expands the input signal of 32 bits to the 63-bit signal of the same time including 32 bits which should be the parallel signal of the same time. Thus a second or 32nd bit within 32 bits inputted at one time are retimed by a first or 31st flip-flop to be a 31st bit from the head of a 63-bit signal in order, and first to 32nd bits 1 in a 32-bit signal inputted at the time next to it are directly outputted to be a 33rd bit and bits following it of the 63-bit signal in order so that the 32-bit signal across the two times is converted to 63 bits of the same time. This parallel signal is shifted by the prescribed number of bits to fetch 32 bits, which should be the parallel signal of the same time, from the 63 bits.;COPYRIGHT: (C)1997,JPO