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MEMORY CONTROLLER FOR BOTH INTERLEAVED AND NON-INTERLEAVED MEMORY
MEMORY CONTROLLER FOR BOTH INTERLEAVED AND NON-INTERLEAVED MEMORY
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机译:交错和非交错存储器的存储器控制器
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摘要
A system and method for controlling DRAM wherein a memory subsystem can be populated by end users with any of a variety of DRAM chips. A memory controller will size each memory bank and determine whether paired memory banks are to be configured as interleaved or non-interleaved based upon the detected DRAM population. Bank selection logic is designed to account for both size and status (interleaved or non-interleaved) when determining which memory bank contains a memory location of interest. Row and column addressing is selected to minimize decoding of an incoming system address and reduce DRAM access time.
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