首页> 外国专利> INTEGRATED CIRCUIT (IC) DEVICE FORMED ON SOI WAFER HAVING DOPED REGION SEPARATELY FORMED AND ELECTRICALLY CONNECTED UNDER INSULATING LAYER PROVIDED AS CHARGE SINK OR POTENTIAL WELL

INTEGRATED CIRCUIT (IC) DEVICE FORMED ON SOI WAFER HAVING DOPED REGION SEPARATELY FORMED AND ELECTRICALLY CONNECTED UNDER INSULATING LAYER PROVIDED AS CHARGE SINK OR POTENTIAL WELL

机译:在SOI晶片上形成的集成电路(IC)设备具有隔离区域,并在绝缘层下分别形成并电气连接,该绝缘层以电荷沉或势阱提供

摘要

PURPOSE: To lessen an SOI structure in susceptibility to electrostatic discharge or electrical excessive stress. ;CONSTITUTION: A highly-doped region 140 in an enough volume is provided under an insulating layer 120 of a wafer of SOI structure, and contact with a substrate is made from above the surface through an opening provided to the insulating layer 120. In manufacture, a highly-doped layer 140 is formed in the vicinity of the surface of a silicon substrate 130, an oxide layer is formed thereon, and another wafer provided with an oxide layer on its surface is joined to the oxide layer of the silicon substrate 130 (BESOI, etching silicon), or an oxide film is formed on the silicon substrate 130 by injection, and then the highly-doped layer 140 is formed (SIMOX, injected silicon with oxide).;COPYRIGHT: (C)1998,JPO
机译:用途:减少SOI结构对静电放电或过度电应力的敏感性。组成:在SOI结构的晶片的绝缘层120下面提供足够体积的高掺杂区140,并通过设置在绝缘层120上的开口从表面上方与衬底接触。然后,在硅衬底130的表面附近形成高掺杂层140,在其上形成氧化物层,并且将在其表面上设置有氧化物层的另一晶片接合至硅衬底130的氧化物层。 (BESOI,蚀刻硅)或通过注入在硅衬底130上形成氧化膜,然后形成高掺杂层140(SIMOX,用氧化物注入硅)。版权所有:(C)1998,JPO

著录项

  • 公开/公告号JPH1027893A

    专利类型

  • 公开/公告日1998-01-27

    原文格式PDF

  • 申请/专利权人 AMER FIB INC;

    申请/专利号JP19940265863

  • 发明设计人 MIN-HWAN MICHAEL RYUU;PEICHIN RIN;

    申请日1994-10-28

  • 分类号H01L27/12;H01L27/04;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-22 03:05:27

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