首页> 外国专利> LAYOUT DESIGN SYSTEM FOR POWER CIRCUIT BOARD, DESIGN RULE CHECK METHOD APPLIED TO THE SYSTEM AND PATTERN WIRING METHOD

LAYOUT DESIGN SYSTEM FOR POWER CIRCUIT BOARD, DESIGN RULE CHECK METHOD APPLIED TO THE SYSTEM AND PATTERN WIRING METHOD

机译:电源电路板的布局设计系统,适用于系统的设计规则检查方法和图案接线方法

摘要

PROBLEM TO BE SOLVED: To provide a layout design system for power circuit board which drastically reduces the designation number of signal kinds required in checking, for example, the distance between patterns on a power circuit board. ;SOLUTION: A design check program 10 provided in the layout design system retrieves parts, which are directly or indirectly connected to a designated signal terminal at the time of propagating a primary signal, from on the circuit board expressed with layout design data 11 by parts and pin designation data 12. In the same manner, the program 10 retrieves parts, which are directly or indirectly connected to the designated signal terminal at the time of propagating a secondary signal, and retrieves parts which are directly or indirectly connected to the designated signal terminal at the time of propagating a ground signal. The signal kind of a pattern connecting parts is discriminated based on this retrieval result, and the distance between patterns on the circuit board is checked based on this discrimination result and gap allowable value data 13, and the check result is outputted as check result data.;COPYRIGHT: (C)1999,JPO
机译:解决的问题:提供一种用于电源电路板的布局设计系统,该系统可大大减少检查例如电源电路板上的图案之间的距离所需的信号种类的指定数量。 ;解决方案:布局设计系统中提供的设计检查程序10从零件上以布局设计数据11表示的电路板上检索在传播原始信号时直接或间接连接到指定信号端子的零件。以及引脚指定数据12。以相同的方式,程序10获取在传播次级信号时直接或间接连接至指定信号端子的部分,并获取直接或间接连接至指定信号的部分。传播地面信号时的端子。根据该检索结果,判别图案连接部的信号种类,并根据该判别结果和间隙容许值数据13来检查电路基板上的图案间的距离,并将该检查结果作为检查结果数据输出。 ;版权:(C)1999,日本特许厅

著录项

  • 公开/公告号JPH11272736A

    专利类型

  • 公开/公告日1999-10-08

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP19980077538

  • 发明设计人 INOUE KAZUO;

    申请日1998-03-25

  • 分类号G06F17/50;H05K3/00;

  • 国家 JP

  • 入库时间 2022-08-22 02:34:11

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