Single-cycle, soft decision, compare-select operation using dual-add processor

摘要

In accordance with the invention, a method of generating a soft symbol confidence level for use in decoding a received digital signal includes calculating a difference between two potential next state accumulated costs (PNS00, PNS01) to provide a soft symbol confidence level. Simultaneously with calculating the difference between two potential next state accumulated costs, performing a compare-select operation to identify one of the two potential next state accumulated costs as an extremum of the two present state accumulated costs. The invention also teaches a circuit for generating a soft symbol confidence level such as in a decoder. The circuit includes first and second adders for receiving first and second potential next state accumulated costs. Simultaneously the potential next state accumulated costs are compared in one of the adders while the difference is taken in the other adder as a soft symbol confidence level. A selector selects one of the first and second potential next state accumulated costs as an extremum based on a flag set by one of the adders. The circuit may also provide a register in which to store one or more traceback bits, and a shift register for packing multiple traceback bits into a register or word.