A method and apparatus are disclosed for optimizing cost-based heuristic instruction scheduling for a pipelined processor that has a special use for compound time instruction scheduling after code generation.;Instruction scheduling is optimized by determining the optimal weight to be used by the cost-based heuristic instruction scheduling apparatus for a particular pipelined processor. The optimal weight is determined based on the lowest of the best costs incurred by another set of correlation weights.;Each set of correlation weights includes a randomly generated initial weight set and a sequential correlation weight set that is generated in a predetermined manner.;Certain schemes for generating a sequential weight set facilitate the rapid identification of the optimal weight set for one end and the overall optimal weight set for one end.
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