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Method to form ultra-short channel elevated S/D MOSFETS on an ultra-thin SOI substrate

机译:在超薄SOI衬底上形成超短沟道高架S / D MOSFET的方法

摘要

The method includes forming a buried oxide layer in a substrate. A pad oxide layer is then form on the substrate. A silicon nitride layer is pattered on the surface of the pad oxide. Then, a thick field oxide (FOX) is formed on the pad oxide layer. Sidewall spacers are formed on the side walls of the opening of the silicon nitride layer. Next, the FOX is etched. An ion implantation is performed for adjusting the threshold voltage and anti-punch-through implantation. Subsequently, a thin silicon oxynitride layer is deposited on the surface of the silicon nitride, spacers and the opening. A polysilicon gate is then formed in the opening. Then, Then, the silicon oxynitride layer, silicon nitride and the spacers are removed. Source and drain are next created. The pad oxide layer and the FOX are then removed. Then, the lightly doped drain (LDD) are formed. Self-aligned silicide (SALICIDE) layer, polycide layer are respectively formed on the substrate exposed by the gate, and on the gate.
机译:该方法包括在衬底中形成掩埋氧化物层。然后在衬底上形成垫氧化物层。氮化硅层形成在垫氧化物的表面上。然后,在衬垫氧化物层上形成厚场氧化物(FOX)。在氮化硅层的开口的侧壁上形成侧壁隔离物。接下来,蚀刻FOX。进行离子注入以调节阈值电压和抗穿通注入。随后,在氮化硅,间隔物和开口的表面上沉积氮氧化硅薄层。然后在开口中形成多晶硅栅极。然后,然后,去除氧氮化硅层,氮化硅和隔离物。接下来创建源极和漏极。然后去除垫氧化物层和FOX。然后,形成轻掺杂漏极(LDD)。自对准硅化物(SALICIDE)层,多晶硅化物层分别形成在被栅极暴露的基板上和栅极上。

著录项

  • 公开/公告号US5956580A

    专利类型

  • 公开/公告日1999-09-21

    原文格式PDF

  • 申请/专利权人 TEXAS INSTRUMENTS-ACER INCORPORATED;

    申请/专利号US19980042348

  • 发明设计人 SHYE-LIN WU;

    申请日1998-03-13

  • 分类号H01L22/8232;

  • 国家 US

  • 入库时间 2022-08-22 02:07:14

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