Structures of a low-voltage-operative non-volatile ferroelectric memory device with floating gate

摘要

A non-volatile ferroelectric memory device has been developed, in which the lead titanate (PbTiO.sub.3) thin film is deposited on a n/P. sup.+ Si substrate by rf magnetron sputtering as the gate oxide and Pt is embedded in the gate oxide as the floating gate. Additionally, associated with the rapid bulk channel structure with higher mobility, the developed memory device has the following features: (1) low write/erase voltage (. ltoreq.10 V); (2) fast access time ( 160 ns); (3) easy to fabricate on VLSI memory device.