首页> 外国专利> a ATM Cell Multiplying and Demultiplying Apparatus

a ATM Cell Multiplying and Demultiplying Apparatus

机译:ATM信元乘法和解乘法设备

摘要

PURPOSE: An apparatus for multiplexing and demultiplexing an ATM cell is provided to multiplex the ATM cell inputted from a physical layer board, add routing information to the multiplexed ATM cell to transmit the ATM cell to a switch network, and demultiplex the ATM cell received from the switch network. CONSTITUTION: A clock unit(40) receives a system clock to divide the received system clock to each composition block and generates a clock to be used in a line device. A control unit(50) performs various OAM(Operation Administration and Maintenance) functions and connection management functions and performs a communication with an upper control module through an internal message. A physical layer interface unit(10) multiplexes ATM cells from each line device by a round robin type and demultiplexes the ATM cells to output the demultiplexed ATM cell to a corresponding line device. A switch line matching unit(30) performs a block coding of a received internal cell and converts the coded internal cell into a serial data to transmit the serial data to a switch network, and performs a block coding of an internal cell received from a corresponding switch network and converts the coded internal cell into a serial data to transmit the serial data to the switch network, and converts the serial data received from the corresponding switch network into a parallel data and decodes the coded data. An ATM layer processing unit(20) classifies the ATM cell received from the physical layer interface unit(10) to provide the classified ATM cell to the switch line matching unit(30) or the control unit(50), and converts data from the switch line matching unit(30) or the control unit(50) into an ATM cell to transmit the ATM cell to the physical layer interface unit(10).
机译:目的:提供一种用于对ATM信元进行复用和解复用的设备,以复用从物理层板输入的ATM信元,将路由信息添加到复用的ATM信元,以将ATM信元发送到交换网络,以及对从ATM信元接收到的ATM信元进行解复用。交换网络。组成:时钟单元(40)接收系统时钟,以将接收到的系统时钟分配给每个合成块,并生成要在线路设备中使用的时钟。控制单元(50)执行各种OAM(操作管理和维护)功能和连接管理功能,并通过内部消息与上级控制模块进行通信。物理层接口单元(10)以循环方式对来自每个线路设备的ATM信元进行复用,并对ATM信元进行解复用,以将解复用后的ATM信元输出至相应的线路设备。交换线路匹配单元(30)对接收到的内部单元进行块编码,并将编码后的内部单元转换为串行数据,以将该串行数据发送至交换网络,并对从相应内部单元接收的内部单元进行块编码。交换网络,并将编码后的内部单元转换为串行数据,以将串行数据传输至交换网络,并将从相应交换网络接收到的串行数据转换为并行数据,并对编码数据进行解码。 ATM层处理单元(20)对从物理层接口单元(10)接收到的ATM信元进行分类,以将分类后的ATM信元提供给交换线路匹配单元(30)或控制单元(50),并转换来自该物理层接口单元(10)的数据。将线路匹配单元(30)或控制单元(50)切换到ATM信元,以将ATM信元发送到物理层接口单元(10)。

著录项

  • 公开/公告号KR20010087707A

    专利类型

  • 公开/公告日2001-09-21

    原文格式PDF

  • 申请/专利权人 LG INFORMATION & COMMUNICATIONS LTD.;

    申请/专利号KR20000011609

  • 发明设计人 CHOI TAE GEUN;

    申请日2000-03-08

  • 分类号H04L12/28;

  • 国家 KR

  • 入库时间 2022-08-22 01:12:52

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号