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Capacitors with silicized polysilicon shielding in digital CMOS process

机译:数字CMOS工艺中具有硅化多晶硅屏蔽的电容器

摘要

The present invention provides for a shielded capacitor in a digital CMOS fabrication process. The shield capacitor comprises a first surface (also known as a top plate) and a second surface (the bottom plate). The bottom plate has two portions which are connected, and the two portions of the bottom plate are positioned to sandwich the top plate in between the portions. A polysilicon layer is fabricated between the plates and the substrate of the semiconductor to isolate the plates from the substrate. To build the shielded capacitor, the polysilicon layer is fabricated first, then the plates are built on top of the polysilicon layer. The polysilicon layer is silicized and is often connected to the ground.
机译:本发明提供了一种在数字CMOS制造工艺中的屏蔽电容器。屏蔽电容器包括第一表面(也称为顶板)和第二表面(底板)。底板具有被连接的两个部分,并且底板的两个部分被定位成将顶板夹在这两个部分之间。在板和半导体的衬底之间制造多晶硅层,以将板与衬底隔离。为了构建屏蔽电容器,首先制造多晶硅层,然后在多晶硅层的顶部构建极板。多晶硅层被硅化并且经常接地。

著录项

  • 公开/公告号US6198153B1

    专利类型

  • 公开/公告日2001-03-06

    原文格式PDF

  • 申请/专利权人 LSI LOGIC CORPORATION;

    申请/专利号US19970840948

  • 发明设计人 EDWARD W. LIU;SEE-HOI CAESAR WONG;

    申请日1997-04-21

  • 分类号H01L271/08;H01L290/00;

  • 国家 US

  • 入库时间 2022-08-22 01:04:56

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