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High side current source circuit having improved output impedance to reduce effects of leakage circuit

机译:高端电流源电路,其输出阻抗得到改善,以减少泄漏电路的影响

摘要

A high side low voltage current source circuit having improved output impedance to reduce effects of leakage current. A current source circuit is described with a transistor having an emitter coupled to an emitter degeneration resistor which is coupled to a power supply voltage. The output of the current source is taken at the collector of the transistor. In one embodiment, the transistor is a PNP transistor device. The base of the transistor is coupled to the output of an operational amplifier. One input of the operational amplifier is coupled in a feedback loop to the emitter of the transistor. A direct current bias voltage is applied to the other input of the operational amplifier. The output impedance (R″o) of the current is source is based on the open loop gain of the operational amplifier (e.g., about 35 dB) and is therefore orders of magnitude larger than the output impedance of other prior art current source designs. Also included is a novel level shifting circuit for shifting (up) the DC voltage level at the emitter of the transistor to improve its dynamic range of operation in low power supply voltage environments. A resistor is also placed in a tail current path of the operational amplifier, rather than a transistor, to further improve the dynamic range of the current source. The present invention finds particular application within a clock generator circuit where its reduced leakage current properties and improved dynamic range help to reduce clock jitter.
机译:一种高侧低压电流源电路,具有改进的输出阻抗,可减少漏电流的影响。描述了一种电流源电路,该晶体管的晶体管的发射极耦合到发射极负反馈电阻,该发射极负反馈电阻耦合到电源电压。电流源的输出在晶体管的集电极处获取。在一个实施例中,该晶体管是PNP晶体管器件。晶体管的基极耦合到运算放大器的输出。运算放大器的一个输入在反馈环路中耦合到晶体管的发射极。直流偏置电压被施加到运算放大器的另一个输入。电流源的输出阻抗(R o)基于运算放大器的开环增益(例如约35 dB),因此比其他现有技术电流源设计的输出阻抗大几个数量级。还包括一种新颖的电平移位电路,用于上移(上移)晶体管发射极的直流电压电平,以改善其在低电源电压环境下的动态工作范围。电阻器而不是晶体管也放置在运算放大器的尾部电流路径中,以进一步改善电流源的动态范围。本发明在时钟发生器电路中发现了特殊的应用,其中其减少的泄漏电流特性和改进的动态范围有助于减少时钟抖动。

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