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Time-base error amendment device

机译:时基误差修正装置

摘要

PURPOSE:To reduce a velocity error included in an analog video signal being an output of a phase modulator by adding two circuits being a velocity error generator and a phase modulator to a video disk player. CONSTITUTION:A synchronizing separator circuit 15 separates a horizontal synchronizing signal included in an input video signal and gives the signal to a frequency control circuit 16. The circuit 16 generates a signal of the same frequency as that of a write clock to a memory 11 based on the horizontal synchronizing signal and gives the signal to a phase controller 14. The controller 14 separates the frequency as the write clock and uses it for the frequency of a write clock WCK. The clock WCK is given to an A/D converter 10, which converts the clock into a digital clock and it is fed to a data input of the memory 11. On the other hand, a start signal WS synchronously with the horizontal synchronizing signal in the video signal inputted to the circuit 16 is fed to a memory controller 17 and the circuit 14 gives the clock WCK to th controller 17, in which a time axis error for each horizontal synchronizing signal is eliminated.
机译:目的:通过向视频磁盘播放器添加两个电路,即速度误差发生器和相位调制器,以减少作为相位调制器输出的模拟视频信号中包含的速度误差。组成:同步分离器电路15分离包含在输入视频信号中的水平同步信号,并将其提供给频率控制电路16。电路16产生与写时钟相同频率的信号到存储器11在水平同步信号上,该信号被提供给相位控制器14。控制器14将频率分离为写时钟,并将其用于写时钟WCK的频率。时钟WCK被提供给A / D转换器10,A / D转换器10将时钟转换成数字时钟,并且被馈送到存储器11的数据输入。另一方面,开始信号WS与水平同步信号in同步。输入到电路16的视频信号被送到存储控制器17,电路14把时钟WCK送到控制器17,在控制器17中消除了每个水平同步信号的时间轴误差。

著录项

  • 公开/公告号JP3238988B2

    专利类型

  • 公开/公告日2001-12-17

    原文格式PDF

  • 申请/专利权人 三洋電機株式会社;

    申请/专利号JP19930160845

  • 发明设计人 野原 一倫;

    申请日1993-06-30

  • 分类号H04N5/956;H04N9/896;

  • 国家 JP

  • 入库时间 2022-08-22 00:58:45

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