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Phase and frequency-locked loop circuits

机译:锁相和锁相环电路

摘要

The invention relates to phase and frequency-locked loop circuits (PLL and FLL circuits) with a controllable tracking oscillator whose signal phase relationship or frequency, respectively, is influenced by an external parameter, a reference oscillator, as well as a phase or frequency comparator, the output signal of which is used to control the tracking oscillator in such a way that any phase or frequency errors are reduced. The invention provides for an element for the measurement of the external parameter (such as a microprocessor) which is capable of receiving a signal representing the output signal of the phase or frequency comparator, and convert it into a measurement value that represents the present value of the external parameter. This external parameter can, for example, represent the ambient temperature or the supply voltage of the tracking oscillator.
机译:本发明涉及具有可控跟踪振荡器的锁相和锁频环路电路(PLL和FLL电路),其信号相位关系或频率分别受外部参数,参考振荡器以及相位或频率比较器的影响,其输出信号用于控制跟踪振荡器,以减少任何相位或频率误差。本发明提供了一种用于测量外部参数的元件(例如微处理器),该元件能够接收代表相位或频率比较器的输出信号的信号,并将其转换为代表电流的当前值的测量值。外部参数。该外部参数可以例如表示环境温度或跟踪振荡器的电源电压。

著录项

  • 公开/公告号US2002118073A1

    专利类型

  • 公开/公告日2002-08-29

    原文格式PDF

  • 申请/专利权人 DIEWALD HORST;

    申请/专利号US20020077248

  • 发明设计人 HORST DIEWALD;

    申请日2002-02-15

  • 分类号H03L1/00;

  • 国家 US

  • 入库时间 2022-08-22 00:51:25

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