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System and method for interactive implementation and testing of logic cores on a programmable logic device
System and method for interactive implementation and testing of logic cores on a programmable logic device
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机译:用于交互式实现和测试可编程逻辑设备上的逻辑核心的系统和方法
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摘要
A system and method for developing a circuit design for a programmable logic device. A tool is provided for interactively modifying a configuration bitstream, downloading the bitstream to a programmable logic device (PLD), and reading back and displaying state information from the PLD. In one embodiment, the tool is command driven. Responsive to a first command, the tool implements a selected logic core from a library of run-time parameterizable logic cores in a configuration bitstream. The bitstream can be automatically downloaded to the PLD as part of the first command, or alternatively, using a separate command. A second command is available for applying a clock signal to the PLD. After application of the clock signal, the states of selected elements implemented by the logic core are reported.
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