Phase locked loop fast tracking phase, frequency and amplitude of the signals single-phase

摘要

This patent, "phase - locked loop" fast tracking phase and amplitude of signals frequ00b3u00eancia single-phase.Refers to an algorithm of PLL (phase locked loop) capable of providing the values of the phase, amplitude and frequ00b3u00eancia of the input signal.Its working principle is based on the transformation of 2 signals (V ~ 244 ~ and V ~ 225 ~), the same frequ00b3u00eancia and amplitude, but lagged 90 198 ,Associated with a reference system ( 244 and 225 ) static, to a new reference system (D and Q),With orthogonal axes and rotating in the same frequ00b3u00eancia signals V ~ 244 ~ and V ~ 225 ~ (processing park).In this new system of reference, the sinusoidal quantities are converted to equivalent continuous magnitudes (V ~ d ~ and V ~ Q ~), I have the information about the amplitude of the input signals.Since the algorithm of PLL proposed here is implemented in single phase signals.The supplementary signal (V ~ 225 ~) is obtained from the inverse transformation of signals V ~ d ~ and V ~ Q ~ for reference, 244 and 225.We obtain, in this way, a pair of signals V ~ 244 and 225 ~ V ~ '~, of which V 244 ', has a phase and amplitude equal to V 244 and V ~ 225 'is used as the signal complementary to V 244 .