Electronic systems are becoming increasingly complex and processing is commonly broken down into manageable and testable sub-functions. These sub-functions intercommunicate to pass the data and control signals to complete the system. Described herein is an improved electronic system which comprises a sub-function processor nodes (20) array (10). Each sub-function processor node (20) is connected to a secondary bus (30, 30A, 30B, 30C, 30D, 30E, 30F) via a link (32) for receiving timing and synchronisation signals along with multiple access parameters under the control of a system communication controller (40). Each sub-function node (20) has an antenna for receiving and transmitting data between other sub-function processor nodes using radio links. The invention may be applied to integrated circuits, racks of printed circuit boards, or larger scale systems.
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