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Charge pump circuit with voltage multiplier for boosting clock signal and method thereof

机译:具有升压时钟信号的倍压器的电荷泵电路及其方法

摘要

A charge pump circuit is provided. The charge pump circuit includes at least one voltage-boosting stage connected in series with each other and having a supply terminal, a control terminal, and an output terminal respectively, and at least one voltage multiplier having an input terminal, a first output terminal for outputting a first clock signal, and a second output terminal for outputting a second clock signal respectively, wherein the input terminal of a first voltage multiplier is coupled to a clock signal, the first clock signal is a voltage-multiplying signal of the second clock signal, each of the voltage multipliers is coupled the respective second output terminal thereof to the input terminal of a downstream voltage multiplier, and the first output terminal of the voltage multiplier is coupled to the control terminal of a respective one of the voltage-boosting stage.
机译:提供了电荷泵电路。电荷泵电路包括:至少一个升压级,其彼此串联连接并且分别具有电源端,控制端和输出端;以及至少一个倍压器,其具有输入端,第一输出端,​​用于分别输出第一时钟信号和第二输出端,用于输出第二时钟信号,其中第一电压倍增器的输入端耦接至时钟信号,所述第一时钟信号为第二时钟信号的倍压信号每个电压倍增器的各自第二输出端耦合至下游电压倍增器的输入端,并且电压倍增器的第一输出端耦合至各个升压级的控制端。

著录项

  • 公开/公告号US2003155963A1

    专利类型

  • 公开/公告日2003-08-21

    原文格式PDF

  • 申请/专利权人 WINBOND ELECTRONICS CORP.;

    申请/专利号US20020234891

  • 发明设计人 CHUNG-MENG HUANG;

    申请日2002-09-04

  • 分类号G05F1/10;

  • 国家 US

  • 入库时间 2022-08-22 00:10:40

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