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Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources
Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources
A Variable Grain Architecture (VGA) device includes a shared output component (SOC) that may be used for programmably-routing process result signals onto either or plural ones of differently directed longlines within an FPGA. Plural VGB's make shared use of each SOC to output respective function signals to the longlines. The SOC may be also used for programmably-routing signals (e.g., feedthrough signals) that are selectively acquired from either one of equivalent but differently positioned interconnect channels. Such freedom in routing VGB result signals or feedthrough signals can allow FPGA configuring software to explore a wider range of partitioning, placement and/or routing options for finding optimized implementations in the VGA FPGA device of various, supplied design specifications.
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