MULTILAYERED CAPACITOR STRUCTURE WITH ALTERNATELY CONNECTED CONCENTRIC LINES FOR DEEP SUBMICRON CMOS

摘要

A capacitor structure having a first and at least a second level of electrically conductive concentric lines of an open-loop configuration. The conductive lines of the at least second level overlie the conductive lines of the first level. A dielectric material is disposed between the first and second levels of conductive lines and between the conductive lines in each of the first and second levels. The conductive lines are electrically connected in an alternating manner to terminals of opposing polarity so that capacitance is generated between adjacent lines in each level and in adjacent levels. The capacitor especially useful in deep sub-micron CMOS.