This invention provides a circuit for detecting an abnormal operation of memory, an integrated circuit including the same and a method for detecting an abnormal operation capable of detecting an abnormal operation of memory before an error occurs in the integrated circuit of a micro-computer and the like due to the data wrongly output from the memory and of enhancing the reliability of integrated circuit. More specifically, this invention provides a circuit for detecting an abnormal operation of memory comprising: a delay circuit 102 for delaying an output data 123 of memory 101 for a predetermined period of time and for outputting this data as a delay data 124; and a comparison circuit 106 for outputting an incoincidence signal 127 in case that the output data 123 of the memory 101 and the delay data 124 are not coincident with each other after compared.
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