This invention relates to a digital/analog converter circuit, a level shift circuit, a shift register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display device mounted with these respective circuits, wherein a drive circuit integrated with the LCD device containing the digital/analog converter circuit has polysilicon thin film transistors arrayed in a matrix on the substrate as switching devices for the pixels, a level shift circuit in the shift register has a basic structure of CMOS latch cells and is utilized in each level shift of the clock signal at each transfer stage, a sampling latch circuit with a basic structure of CMOS latch cells has a level shift function, and these respective circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated liquid crystal display device to provide an LCD panel with an extremely narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit structure having an extremely small number of components, low power consumption and a small surface area.
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