A microcomputer malfunction monitoring system comprises a controlled unit, a microcomputer control unit for sending a system operation signal to the controlled unit, a reset IC having a watchdog function, and a detection circuit. The reset IC having a watchdog function comprises a watchdog timer circuit and a first voltage monitoring circuit. And the detection circuit comprises a second voltage monitoring circuit and an abnormality monitoring circuit. When clock signals which are output from the microcomputer control unit successively along with normal program processing cease, the watchdog timer circuit outputs short pulse signals at predetermined time intervals to reset the program processing of the microcomputer control unit until the clock signals are output again. The first voltage monitoring circuit outputs a long pulse signal when the power voltage E falls below a threshold value WD. The abnormality monitoring circuit detects the lengths of the pulse signals, counts only short pulse signals from the watchdog timer circuit, and outputs a malfunction detection signal to the controlled unit when the count number reaches a predetermined value. When a drop in power voltage E is detected by at least one of the first and second voltage monitoring circuits, in addition to a low voltage when power is turned on, the count value of the abnormality monitoring circuit is reset.
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