Resistance defect assessment device, resistance defect assessment method, and method for manufacturing resistance defect assessment device

摘要

A resistance defect assessment device provided on a wafer for assessing a resistance variation defect in a component of an integrated circuit device, the resistance defect assessment device including test patterns capable of measuring a resistance variation component to be the resistance variation defect in each chip area or each shot area of the wafer, wherein the number of test patterns included in one chip area or one shot area is set so that it is possible to estimate the yield of the integrated circuit device.