WRITE PATH SCHEME OF SYNCHRONOUS DRAM FOR REDUCING POWER CONSUMPTION THROUGH OPERATING DATA INPUT/OUTPUT SENSE AMPLIFIERS INDIVIDUALLY

摘要

PURPOSE: A write path scheme of a synchronous DRAM is provided to reduce the power consumption by separately operating the data input/output sense amplifiers according to a mode selection signal. CONSTITUTION: A write path scheme of a synchronous DRAM comprises a data converting part, a multiplexer, data input/output sense amplifiers(S1-S64), a write driver. Wherein, data input/output sense amplifiers(S1-S64) are divided into four blocks(S1-S16, S17-S32, S33-S48, S49-S64), and each block is connected to each enable circuit(130, 140, 150, 160). A first block of sense amplifiers(S1-S16) are enabled only by the output(din_iosa1) of the first enable circuit(130), the block of sense amplifiers(S17-S32) are enabled only by the output(din_iosa2) of the second enable circuit(140), the block of sense amplifiers(S33-S48) are enabled only by the output(din_iosa3) of the third enable circuit(150), and the block of sense amplifiers(S49-S64) are enabled only by the output(din_iosa4) of the fourth enable circuit(160).