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DIGITAL CIRCUIT USING MEMORY FOR MONITORING SIGNALS FOR OCCURRENCES OF PREDEFINED BREAKPOINT CONDITIONS

机译:使用存储器的数字电路,用于监视预定义断点条件发生的信号

摘要

Stop unit includes a digital signal memory circuit (30, 50) for monitoring the (B 1, ..., B n, C 1, ..., C m) with respect to the occurrence of any of the plurality of predefined conditions It includes. The memory circuit has a memory cell array (34, 53), one cell selected from the group consisting of include and the cells (each cell storing data (I i, K lm) for determining the value of interest, stop condition) is the signal bit in response to the various combinations it can be read out. The accessed data values ​​are used for operation of the circuit 20 for generating the signal to be monitored as a stop signal to stop or reset. Alternative embodiment multiple of the memory circuit (41, 42; 60, 61) for monitoring the set of distinct signal bits for the different interest conditions the data value may have a corresponding access is a logic gate (43) in order to generate a bond or stop signal (K ij, L m) by it can be used as an input to the memory circuit 62 of the second stage.
机译:停止单元包括一个数字信号存储电路(30、50),用于监视(B 1, ...,B n, C 1, ...,C m)关于它包括的多个预定义条件中的任何一个。该存储电路具有一个存储单元阵列(34、53),从包括和存储单元(每个存储数据(I i, K lm)的单元)中选择一个单元。确定感兴趣值的子>(停止条件)是响应各种组合的信号位,可以将其读出。所访问的数据值用于电路20的操作,以生成要监视的信号作为停止信号以停止或复位。替代实施例的存储器电路(41、42; 60、61)的倍数是逻辑门(43),用于针对不同的兴趣条件监视一组不同的信号位,数据值可以具有相应的访问权限或停止信号(K ij, L m)可以用作第二级存储电路62的输入。

著录项

  • 公开/公告号KR100495755B1

    专利类型

  • 公开/公告日2005-06-17

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR19997011268

  • 发明设计人 네프 할란 더블유;

    申请日1999-12-02

  • 分类号G06F11/25;

  • 国家 KR

  • 入库时间 2022-08-21 22:03:44

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