The transistor array includes conductive lines, the functional lines and transistors. Each of the electrically conductive wire comprises a conductive layer covering the center line and the center line. Each of the function lines comprising an insulating layer and a semiconductor layer covering the surface of the insulating layer which covers the center line, the center line of the surface with at least a surface electrical conductivity. Each feature line is arranged to contact and intersect with the conductive wires. Each transistor is, one conductive line is defining the area of intersection as a corresponding one of the function lines, the semiconductor layer and the ohmic contact and the first ohmic contact region in the semiconductor layer and the ohmic contact and the second ohmic contact areas in, and the between the first ohmic contact region and the second ohmic contact region comprises a channel region defined by these.
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