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A Method for manufacturing of Bottom Gate type p-Si Thin Film Transistor Device

机译:底栅型p-Si薄膜晶体管器件的制造方法

摘要

In the present invention, to provide a method of manufacturing the bottom-gate type thin film transistor element of the process is simplified by using the etching rate difference between the amorphous silicon and polysilicon for manufacturing a semiconductor layer made of polysilicon without further separate photolithography process bottom, and it characterized in that it provides a process for the preparation of the gate type polysilicon thin film transistor element, and thus has the advantage that the product yield improvement through process simplification and reduced manufacturing costs.
机译:在本发明中,提供一种制造底栅型薄膜晶体管元件的方法,该方法通过使用非晶硅和多晶硅之间的蚀刻速率差来简化由多晶硅制成的半导体层的制造而无需进一步的光刻工艺,从而简化了该工艺其特征在于,它提供了一种制备栅极型多晶硅薄膜晶体管元件的方法,因此具有通过简化工艺和降低制造成本来提高产品产量的优点。

著录项

  • 公开/公告号KR100539623B1

    专利类型

  • 公开/公告日2005-12-28

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20030041696

  • 发明设计人 유재성;

    申请日2003-06-25

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 21:27:10

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