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Latch circuit, shift register circuit, logical circuit and image display device operated with a low consumption of power

机译:锁存电路,移位寄存器电路,逻辑电路和图像显示装置以低功耗运行

摘要

A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts. According to the construction, the amplitude of an input signal can be made smaller than a supply voltage of the logical circuit.
机译:CMOS逻辑电路包括两个电流路径,每个电流路径具有由n型和p型晶体管组成的电路。在由n型或p型晶体管组成的电路中,一个电流路径具有与具有使CMOS逻辑电路的n型晶体管输出与逻辑运算结果相似的逻辑运算结果的电路相同的电路。另一电流路径具有与具有使该逻辑电路的输出与该逻辑电路相类似的逻辑运算结果的CMOS逻辑电路的p型晶体管的电路相同的结构的电路。在由另一种沟道类型组成的另一电路中,设置在一个电流路径上的晶体管的栅极和设置在另一电流路径上的晶体管的栅极连接到对应的漏极。根据该构造,可以使输入信号的幅度小于逻辑电路的电源电压。

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