PROBLEM TO BE SOLVED: To reduce the scale of a processing unit.;SOLUTION: A control circuit 14 supplies a CS signal to select a Y±I memory 13A, when an NTSC signal of a notice pixel is a Y-I signal and a Y+I signal and to select a Y±Q memory 13B when the NTSC signal of the noted pixel is a Y-Q signal and a Y+Q signal to a prediction coefficient memory section 13. A code inversion circuit 17 inverts the code of each of U, V signals inputted from an arithmetic circuit 16 (executes code inversion processing), when the notice pixel is the Y-I signal or the Y-Q signal, based on the CS signal inputted from the control circuit 14 and does not apply the code sign inversion processing to the U, V signals, when the notice pixel is the Y+I signal or the Y+Q signal and output them.;COPYRIGHT: (C)2000,JPO
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