首页> 外国专利> DATA ACCESSING INTERFACE HAVING MULTIPLEX OUTPUT MODULE AND SEQUENTIAL INPUT MODULE BETWEEN MEMORY AND SOURCE TO SAVE ROUTING SPACE AND POWER AND RELATED METHOD THEREOF

DATA ACCESSING INTERFACE HAVING MULTIPLEX OUTPUT MODULE AND SEQUENTIAL INPUT MODULE BETWEEN MEMORY AND SOURCE TO SAVE ROUTING SPACE AND POWER AND RELATED METHOD THEREOF

机译:具有存储器和源之间的多路输出模块和顺序输入模块的数据访问接口,以节省布线空间和功率及其相关方法

摘要

A data accessing interface between memory and source in LCD display IC includes a multiplex output module and a sequential input module. Suppose a row width of the memory is N bit. The multiplex output module is for outputting a row N-bit digital data. The multiplex output module includes a buffer for receiving the row N-bit digital data from the memory; and a multiplex unit for continuously selecting M bits from the N bit digital data to output to source. After N/M times, all of the row N bit digital data will be output to source. The sequential input module includes N latches and N/M latch control signals; when each latch control signal is active, it will latch M bit digital data from the multiplex output into M latches. After N/M latch control signals are active sequentially, the N bit digital data are stored into the N latches for source.
机译:LCD显示IC中存储器和源之间的数据访问接口包括一个多路输出模块和一个顺序输入模块。假设存储器的行宽是N位。复用输出模块用于输出行N位数字数据。复用输出模块包括:缓冲器,用于从存储器接收行N位数字数据;以及缓冲器。复用单元,用于从N位数字数据中连续选择M位以输出到源。在N / M次之后,所有的行N位数字数据都将输出到源。顺序输入模块包括N个锁存器和N / M个锁存器控制信号。当每个锁存器控制信号有效时,它将把来自复用输出的M位数字数据锁存到M个锁存器中。在依次激活N / M锁存器控制信号之后,将N位数字数据存储到N个锁存器中作为源。

著录项

  • 公开/公告号US2008094338A1

    专利类型

  • 公开/公告日2008-04-24

    原文格式PDF

  • 申请/专利权人 CHING-FANG HSIAO;

    申请/专利号US20060552513

  • 发明设计人 CHING-FANG HSIAO;

    申请日2006-10-24

  • 分类号G09G3/36;

  • 国家 US

  • 入库时间 2022-08-21 20:14:59

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