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MEMORY CELL OF A RESISTIVE SEMICONDUCTOR MEMORY DEVICE, A RESISTIVE SEMICONDUCTOR MEMORY DEVICE HAVING A THREE-DIMENSIONAL STACK STRUCTURE, AND RELATED METHODS
MEMORY CELL OF A RESISTIVE SEMICONDUCTOR MEMORY DEVICE, A RESISTIVE SEMICONDUCTOR MEMORY DEVICE HAVING A THREE-DIMENSIONAL STACK STRUCTURE, AND RELATED METHODS
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机译:电阻式存储器结构的存储器单元,具有三维堆叠结构的电阻式存储器结构及其方法
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摘要
A memory cell of a resistive semiconductor memory device, a resistive semiconductor memory device having a three-dimensional stack structure, and related methods are provided. The memory cell of a resistive semiconductor memory device includes a twin cell, wherein the twin cell stores data values representing one bit of data. The twin cell includes a main unit cell connected to a main bit line and a word line, and a sub unit cell connected to a sub bit line and the word line. Also, the main unit cell includes a first variable resistor and a first diode, and the sub unit cell includes a second variable resistor and a second diode.
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