首页> 外国专利> METHOD TO ACHIEVE A LOW COST TRANSISTOR ISOLATION DIELECTRIC PROCESS MODULE WITH IMPROVED PROCESS CONTROL, PROCESS COST, AND YIELD POTENTIAL

METHOD TO ACHIEVE A LOW COST TRANSISTOR ISOLATION DIELECTRIC PROCESS MODULE WITH IMPROVED PROCESS CONTROL, PROCESS COST, AND YIELD POTENTIAL

机译:具有改进的过程控制,过程成本和屈服势的低成本晶体管隔离介电过程模块的方法

摘要

A method of processing a semiconductor structure is provided. The method includes forming a polish stop layer over one or more features on a substrate; forming a first dielectric layer over the polish stop layer, a valley portion of the first dielectric layer being just above a top of the polish stop layer; and polishing the dielectric layer down to the top of the polish stop layer. By forming a just enough dielectric layer to allow gap-fill on the substrate and polishing the dielectric layer down to the top of the polish stop layer, the method can reduce the cost and controls associated with forming the first dielectric layer.
机译:提供了一种处理半导体结构的方法。该方法包括在衬底上的一个或多个特征之上形成抛光停止层;在抛光停止层上形成第一介电层,第一介电层的谷部恰好在抛光停止层的顶部上方;然后将介电层向下抛光至抛光停止层的顶部。通过形成恰好足够的介电层以允许在衬底上间隙填充并且将介电层向下抛光至抛光停止层的顶部,该方法可以降低成本和与形成第一介电层相关的控制。

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