首页> 外国专利> OPTIMIZING DESIGNING APPARATUS OF INTEGRATED CIRCUIT, OPTIMIZING DESIGNING METHOD OF INTEGRATED CIRCUIT, AND STORING MEDIUM IN WHICH PROGRAM FOR CARRYING OUT OPTIMIZING DESIGNING METHOD OF INTEGRATED CIRCUIT IS STORED

OPTIMIZING DESIGNING APPARATUS OF INTEGRATED CIRCUIT, OPTIMIZING DESIGNING METHOD OF INTEGRATED CIRCUIT, AND STORING MEDIUM IN WHICH PROGRAM FOR CARRYING OUT OPTIMIZING DESIGNING METHOD OF INTEGRATED CIRCUIT IS STORED

机译:集成电路的优化设计装置,集成电路的优化设计方法以及存储用于执行集成电路的优化设计方法的程序中的介质

摘要

It is an object of the present invention to provide a method, an apparatus and a program having high optimization precision and capable of obtaining an answer required by a designer in a short time by combining optimization between individual transistors and optimization as the entire circuit, or by appropriately combining judgment of an operation region, an analysis of the operation region and a SWEEP sensitivity analysis when the optimization is carried out. An optimizing designing apparatus of an integrated circuit for designing a circuit, comprises operation region judging means for adjusting an operation region (linear region, saturation region) of the circuit, operation region analysis means for displaying liner characteristics (Ids-Vgs characteristics) of the circuit and saturation characteristics (Ids-Vds characteristics) of the circuit, and SWEEP sensitivity analysis means for displaying variation in output characteristics of the circuit.
机译:本发明的一个目的是提供一种方法,装置和程序,该方法,装置和程序具有较高的优化精度,并且能够通过组合各个晶体管之间的优化和作为整个电路的优化来在短时间内获得设计者所需的答案,或者通过适当地组合操作区域的判断,操作区域的分析和进行优化时的SWEEP灵敏度分析。用于设计电路的集成电路的优化设计设备,包括:用于调整电路的操作区域(线性区域,饱和区域)的操作区域判断装置;用于显示电路的线性特性(Ids-Vgs特性)的操作区域分析装置。电路和电路的饱和特性(Ids-Vds特性),以及SWEEP灵敏度分析装置,用于显示电路的输出特性变化。

著录项

  • 公开/公告号KR100849764B1

    专利类型

  • 公开/公告日2008-07-31

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20030097360

  • 发明设计人 모리겐지;나카지마다카시;

    申请日2003-12-26

  • 分类号G06F17/50;

  • 国家 KR

  • 入库时间 2022-08-21 19:51:47

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