Interconnections between two substrates in power electronic package for chips and components

摘要

A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips (20) and electronic components (30) between the two substrates. Each substrate includes multiple electrical insulator layers (77) and patterned electrical conductor layers, (7, 8, 9, 10, 43) connecting to the electronic components (30), and further includes multiple raised regions or posts, which are bonded together for example with solder (45) so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that the multiple electric circuits are provided on at least one of the substrates. The substrates can be of the direct bonded copper, (DBC) type. A power electronic package can also substrates two substrates which both include recesses or wells, where the electronic components are located at least on one substrate in the wells.