CHARGE TRAPPING NONVOLATILE MEMORY DEVICES WITH A HIGH-K BLOCKING INSULATION LAYER

摘要

Provided is a charge trapping nonvolatile memory device. The charge trapping nonvolatile memory device includes: an active pattern and a gate electrode, spaced apart from each other; a charge storage layer between the active pattern and the gate electrode; a tunnel insulation layer between the active pattern and the charge storage layer; and a blocking insulation layer disposed between the charge storage layer and the gate electrode and including a high-k layer with a higher dielectric constant than the tunnel insulation layer and a barrier insulation layer with a higher band gap than the high-k layer. A physical thickness of the high-k layer is less than or identical to that of the barrier insulation layer