首页> 外国专利> BIT LINE PRECHARGE CIRCUIT AND A NONVOLATILE MEMORY DEVICE INCLUDING THE SAME, CAPABLE OF PREVENTING DRASTIC POWER DROP DURING THE BIT LINE PRECHARGE

BIT LINE PRECHARGE CIRCUIT AND A NONVOLATILE MEMORY DEVICE INCLUDING THE SAME, CAPABLE OF PREVENTING DRASTIC POWER DROP DURING THE BIT LINE PRECHARGE

机译:位线预充电电路和包括其相同的非易失性存储器,能够防止在位线预充电期间产生严重的功率损耗

摘要

PURPOSE: A bit line precharge circuit and a nonvolatile memory device including the same are provided to improve the power drop due to drastic current consumption by precharging the bit line up to a certain level during precharge.;CONSTITUTION: A memory cell array comprises a plurality of cell strings(110, 120). A page buffer(310) is connected through the cell string and bit line of the memory cell array. The page buffer programs the particular data in a memory cell or reads the data stored in the memory cell. The page buffer comprises a bit line selection part(312), a bit line sensing part(316), and a data latch(318).;COPYRIGHT KIPO 2011
机译:目的:提供一种位线预充电电路和包括该位线预充电电路的非易失性存储器件,以通过在预充电期间将位线预充电至一定电平来改善由于电流消耗过大而引起的功率下降;组成:存储单元阵列包括多个电池串数(110,120)。页缓冲器(310)通过存储单元阵列的单元串和位线连接。页缓冲器对存储单元中的特定数据进行编程或读取存储在该存储单元中的数据。页面缓冲器包括位线选择部分(312),位线感测部分(316)和数据锁存器(318)。; COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20100129066A

    专利类型

  • 公开/公告日2010-12-08

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20090047822

  • 发明设计人 KOO CHEOL HEE;

    申请日2009-05-29

  • 分类号G11C16/24;G11C16/30;G11C16/06;

  • 国家 KR

  • 入库时间 2022-08-21 17:53:12

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