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Process / design methodology to enable the analog circuitry and high-performance logic using a single process

机译:流程/设计方法论,可通过单个流程实现模拟电路和高性能逻辑

摘要

Method of using a circuit design using a mixed signal processes are modified and forward bias, to improve analog circuit performance is presented. Circuit including the NMOS and PMOS transistors of the multiple is defined. The body terminal of the NMOS transistor is coupled to a voltage source of the first, the body terminal of the PMOS transistor is connected to a voltage source of the second. And applying a voltage source of said first body terminals of NMOS transistors each selected transistor in the circuit, by a applying a voltage source of said second body terminal of the PMOS transistor each selected , is biased selectively. In one embodiment, the voltage source and the second voltage source of the first may be modified to provide the body terminal of the transistor reverse bias and forward bias.
机译:提出了一种使用混合信号处理的电路设计方法,并对正向偏置进行了改进,以改善模拟电路性能。定义了包括多个NMOS和PMOS晶体管的电路。 NMOS晶体管的本体端子连接至第一晶体管的电压源,PMOS晶体管的本体端子连接至第二晶体管的电压源。然后,通过施加分别选择的PMOS晶体管的所述第二本体端子的电压源,在电路中施加每个被选择的晶体管的NMOS晶体管的所述第一本体端子的电压源,从而被选择性偏置。在一个实施例中,可以修改第一电压源的电压源和第二电压源以提供晶体管的体端子反向偏置和正向偏置。

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