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Graphene Devices and Silicon Field Effect Transistors in 3D Hybrid Integrated Circuits
Graphene Devices and Silicon Field Effect Transistors in 3D Hybrid Integrated Circuits
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机译:3D混合集成电路中的石墨烯器件和硅场效应晶体管
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摘要
A three dimensional integrated circuit includes a silicon substrate, a first source region disposed on the substrate, a first drain region disposed on the substrate, a first gate stack portion disposed on the substrate, a first dielectric layer disposed on the first source region, the first drain region, the first gate stack portion, and the substrate, a second dielectric layer formed on the first dielectric layer, a second source region disposed on the second dielectric layer, a second drain region disposed on the second dielectric layer, and a second gate stack portion disposed on the second dielectric layer, the second gate stack portion including a graphene layer.
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