METHOD AND SYSTEM FOR FLOATING POINT ACCELERATION ON FIXED POINT DIGITAL SIGNAL PROCESSORS

摘要

A system for performing floating point operations comprising a floating point multiply function that utilizes one or more fixed point functional blocks of a processor and one or more dedicated floating point functional blocks of the processor. A floating point add function that utilizes one or more fixed point functional blocks of a processor and one or more dedicated floating point functional blocks of the processor. A floating point normalize function that utilizes one or more fixed point functional blocks of a processor and one or more dedicated floating point functional blocks of the processor.