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Joint process estimator with variable tap delay line for use in power amplifier digital predistortion
Joint process estimator with variable tap delay line for use in power amplifier digital predistortion
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机译:具有可变抽头延迟线的联合过程估计器,用于功率放大器数字预失真
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摘要
Methods and circuits for pre-distorting a signal to compensate for distortion introduced by an electronic device operating on the signal. In an example method, first and second signal samples representing the input and output of the electronic device are generated. The first and second signal samples are spaced at unit-delay intervals, and each of the second signal samples corresponds in time to one of the first signal samples. Pre-distortion weights are then calculated from the first and second signal samples, the pre-distortion weights corresponding to a pre-distortion model comprising a lattice-predictor memory model structure having multiple delays and having at least one multi-unit delay interval between adjacent delays. The calculated pre-distortion weights are then applied to the input signal, using a predistorter with a structure corresponding to the lattice-predictor memory model, to produce a pre-distorted input signal for input to the electronic device.
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