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Method to improve dielectric quality in high-k metal gate technology

机译:高k金属栅极技术中提高介电质量的方法

摘要

The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first active region and a second active region, providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first capping layer and a second capping layer over the high-k dielectric layer, the first capping layer overlying the first region and the second capping layer overlying the second region, forming a layer containing silicon (Si) over the first and second capping layers, forming a metal layer over the layer containing Si, and forming a first gate stack over the first region and a second gate stack over the second active region. The first gate stack includes the high-k dielectric layer, the first capping layer, the layer containing Si, and the metal layer and the second gate stack includes the high-k dielectric layer, the second capping layer, the layer containing Si, and the metal layer.
机译:本公开提供了一种制造半导体器件的方法。该方法包括:提供具有第一有源区域和第二有源区域的半导体衬底;提供具有第一区域和第二区域的半导体衬底;在半导体衬底上方形成高k电介质层;形成第一覆盖层和第一覆盖层。高k介电层上方的第二覆盖层,第一覆盖层覆盖第一区域,第二覆盖层覆盖第二区域,在第一覆盖层和第二覆盖层上方形成包含硅(Si)的层,在第二覆盖层上方形成金属层该层包含硅,并在第一区域上方形成第一栅极堆叠,并在第二有源区域上方形成第二栅极堆叠。第一栅堆叠包括高k介电层,第一覆盖层,包含Si的层和金属层,第二栅堆叠包括高k介电层,第二覆盖层,包含Si的层和金属层。

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