首页>
外国专利>
Method and apparatus for minimizing cache conflict misses
Method and apparatus for minimizing cache conflict misses
展开▼
机译:用于最小化高速缓存冲突未命中的方法和装置
展开▼
页面导航
摘要
著录项
相似文献
摘要
A method for minimizing cache conflict misses is disclosed. A translation table capable of facilitating the translation of a virtual address to a real address during a cache access is provided. The translation table includes multiple entries, and each entry of the translation table includes a page number field and a hash value field. A hash value is generated from a first group of bits within a virtual address, and the hash value is stored in the hash value field of an entry within the translation table. In response to a match on the entry within the translation table during a cache access, the hash value of the matched entry is retrieved from the translation table, and the hash value is concatenated with a second group of bits within the virtual address to form a set of indexing bits to index into a cache set.
展开▼