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BIT STREAM ALIASING IN MEMORY SYSTEM WITH PROBABILISTIC DECODING
BIT STREAM ALIASING IN MEMORY SYSTEM WITH PROBABILISTIC DECODING
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机译:具有概率解码的存储器系统中的位流混淆。
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摘要
An aliasing module is defined and connected to receive a first bit stream to be transmitted over a data bus from a memory to an external controller of the memory. The aliasing module is defined and connected to alias the first bit stream as a second bit stream and transmit the second bit stream over the data bus in lieu of the first bit stream. A de-aliasing module is defined and connected to receive the second bit stream from the data bus at the external controller. The de-aliasing module is defined and connected to de-alias the received second bit stream back to the first bit stream and provide the first bit stream to the external controller for processing.
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