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INTEGRATED CIRCUIT AND METHOD OF FORMING THE INTEGRATED CIRCUIT WITH IMPROVED LOGIC TRANSISTOR PERFORMANCE AND SRAM TRANSISTOR YIELD
INTEGRATED CIRCUIT AND METHOD OF FORMING THE INTEGRATED CIRCUIT WITH IMPROVED LOGIC TRANSISTOR PERFORMANCE AND SRAM TRANSISTOR YIELD
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机译:具有改进的逻辑晶体管性能和SRAM晶体管产量的集成电路和形成集成电路的方法
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摘要
In an integrated circuit that includes an NMOS logic transistor, an NMOS SRAM transistor, and a resistor, the gate of the SRAM transistor is doped at the same time that the resistor is doped, thereby allowing the gate of the logic transistor to be separately doped without requiring any additional masking steps.
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