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Operating A Dual Chipset Network Interface Controller ('NIC') That Includes A High Performance Media Access Control Chipset And A Low Performance Media Access Control Chipset
Operating A Dual Chipset Network Interface Controller ('NIC') That Includes A High Performance Media Access Control Chipset And A Low Performance Media Access Control Chipset
Operating a dual chipset network interface controller (‘NIC’) that includes a high performance media access control chipset and a low performance media access control chipset, including: determining, by a NIC control module, an amount of network traffic being processed by the NIC; determining, by the NIC control module, whether the amount of network traffic being processed by the NIC exceeds a predetermined threshold; responsive to determining that the amount of network traffic being processed by the NIC exceeds a predetermined threshold, configuring, by the NIC control module, the NIC to utilize the high performance media access control chipset for data communications operations; and responsive to determining that the amount of network traffic being processed by the NIC does not exceed the predetermined threshold, configuring, by the NIC control module, the NIC to utilize the low performance media access control chipset for data communications operations.
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