Implementations of the present disclosure involve a system and/or method for measuring on-die voltage levels of an integrated circuit through a digital sampling circuit. In particular, the system and/or method utilizes a delay line based analog-to-digital sampling circuit that produces a voltage reading over time, such as at every high frequency clock cycle. The digitized samples are routed to either an on-die memory structure for later analysis or are transmitted to one or more pins of a chip for capture and analysis by an external analyzer.
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