METHOD AND SYSTEM OF REDUCING POWER SUPPLY NOISE DURING TRAINING OF HIGH SPEED COMMUNICATION LINKS

摘要

A method and system to reduce the power supply noise of a platform during the training of high speed communication links. In one embodiment of the invention, the device has logic to stagger a bit lock pattern for each of one or more communication links and scramble a training sequence for each of the one or more communication links. By doing so, it removes the need for anti-noise circuits and in turn, reduces the silicon area and power of the devices. Further, by having the logic in the physical layers to facilitate the training of the communication links, it eliminates the need to redesign the package of the devices to shift the resonant frequencies.