Disclosed is a computer system for system integration, wherein chip selection for a specific system is performance and reliability optimized and, thereby cost optimized. In the system, a memory stores a chip-level performance specification and a chip-level reliability specifications, each defined for a specific integrated circuit chip that is to be incorporated into a specific system. The memory also stores an inventory that references manufactured instances of the specific integrated circuit chip sorted into bins, which are associated with different performance process windows and which are assigned different reliability levels. A processor uses the inventory to select an instance of the specific integrated circuit chip from one of the bins for actual incorporation into the specific system and does so such that the chip-level performance specification and the chip-level reliability specification are met. Also disclosed are a method and a computer program product that can similarly perform system integration.
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